1. Field of the Invention
The present invention relates to a semiconductor memory device including a stacked gate having a charge accumulation layer and a control gate, and a method of writing data to the semiconductor memory device. The present invention relates to, for example, a technique for preventing erroneous writing to a NAND flash memory.
2. Description of the Related Art
NAND flash memories are conventionally known as nonvolatile semiconductor memories. For the NAND flash memory, a self-boost scheme is commonly used which increases the channel potential of a write inhibited cell through coupling to a gate potential to prevent electrons from being injected into a charge accumulation layer in the cell.
In this case, a program voltage is applied to a selected word line a plurality of times so as to be stepped up for every application. Thus, to prevent an increase in a difference between the channel potential and gate potential of the write inhibited cell, a known technique also steps up a voltage applied to unselected word lines. Such a technique is disclosed in, for example, Jpn. Pat. Appln. KOKAI Publication No. 8-96591.
However, the above-described technique may disadvantageously excessively increase the voltage applied to the unselected word lines, resulting in erroneously write to memory cells connected to the unselected word lines.